(February 9, 2016 at 11:30 am)Rhythm Wrote: LOL< just a couple of days with nand2 and you're already looking to improve their chips. Told you it was awesome.
Your reduction is capable of expressing the full truth table but not the full instruction set of the first. It has to do with the architecture they'll be using for the alu (and gate sharing between serial chipsets) later on. It (yours) is therefore more elegant but less robust.
Remember that when you design your NNs.
No no, just improve my implementation of the chips. The project just gives you the truth table for each gate and specifies the input and output pins, but leaves the implementation up to you... only giving vague hints of how to do it. So it's not me trying to improve their built in chips - I haven't looked at them - but rather just my own.
It made no mention of this at all in the first chapter... that you had to go beyond the truth table comparison as you're suggesting. So are you saying that the best way to implement the Mux chip is indeed by using And, Or, and Not gates to represent the unreduced canonical representation... so that my implementation used too few gates rather than too many? And do you think I've used too few on any of the other chips? I didn't do all of them using the canonical form... some of them I just did by instinct... and some of them, particularly the later, more complex ones, I'm not sure how useful it would be because it only reduces down to ands, nots, and ors so wouldn't say anything about how to use any of the more complex gates you've since created... ie it will show you how to design the chip using only Ands, Ors, and Nots but (presumably) has nothing to say about how to include any composite gates you've created... which I thought was the whole point of this... so you could reuse components in ever increasing levels of abstraction?
