Seeing red

[The Grand Nudger]

No no, just improve my implementation of the chips. The project just gives you the truth table for each gate and specifies the input and output pins, but leaves the implementation up to you... only giving vague hints of how to do it. So it's not me trying to improve their built in chips - I haven't looked at them - but rather just my own.

Ah, roger.  I thought you'd checked the archives against your own.  To me, it sounds like you're doing fantastically.  I have a considerably thicker skull, I constantly referred to pre-built chips when I was going through that project.  

It made no mention of this at all in the first chapter... that you had to go beyond the truth table comparison as you're suggesting. So are you saying that the best way to implement the Mux chip is indeed by using And, Or, and Not gates to represent the unreduced  canonical representation... so that my implementation used too few gates rather than too many?

There is no best, that's the reason that there was no mention made of it.  The best way to follow -any- textbook, however, is to have canon reps available.   That way you always have a solid point to refer back to when you encounter a mystery problem.  Which you will as the system grows increasingly complex.  Basically, the only time it matters whether you use the canonical representation is when you troubleshoot, and even then, if you've satisfied the table and the pins, shouldn't be a problem with reference to the -system-.  

And do you think I've used too few on any of the other chips? I didn't do all of them using the canonical form... some of them I just did by instinct... and some of them, particularly the later, more complex ones, I'm not sure how useful it would be because it only reduces down to ands, nots, and ors so wouldn't say anything about how to use any of the more complex gates you've since created... ie it will show you how to design the chip using only Ands, Ors, and Nots but (presumably) has nothing to say about how to include any composite gates you've created... which I thought was the whole point of this... so you could reuse components in ever increasing levels of abstraction?

It is the point and you will be able to reuse anything you make which satisfies the truth table, the pins.  I'm not concerned at all by your implementations on their own merits (with the exception of abstract principles of utility vs elegance).  My only concern with breaking from canonical representations is at the point in which you find yourself lost in a project.  When you ask yourself "did I build that chip wrong somehow and not realize it" that the canon reps are extremely useful.

I'm just recalling the places where I got stumped precisely -because- the projects are open ended..which, as you've noticed, is the point and the strength of the projects as well. Ultimately, implementation is an exercise in creative problem solving, a skill you pick up by solving problems in different ways, assessing them by different metrics. That you've chosen elegance (in your reduction) will directly translate into speed and economy in your composite gates. My comments on your implementations are irrelevant with regards to their ability to perform their function. I'm just excited, and jumping ahead of you, lol. I see the extra lines in on the initial solution (unreduced) and think of them in terms of the control over the machine they might offer (at the expense of speed and economy). I think that you're on the right track, coming up with the simplest and most direct solution will save you work and cycles.

You're about to build some memories in the next section, literally and figuratively, yeah?